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SRAM22

A parametric single-port SRAM generator for the SKY130 process.

cargo install --git https://github.com/ucb-substrate/sram22 --locked sram22
GDS layout of sram22_64x32m4w8. Open the interactive layout browser.GDS layout of sram22_64x32m4w8. Open the interactive layout browser.
sram22_64x32m4w8 · 64 words × 32 bits · 360.32 × 191.00 µm. Open the layout browser.

Features

Parametric generation

Configurable depth, word width, column multiplexing, and write-mask granularity. SRAM22 generates the array geometry and sizes the decoders and wordline drivers for each configuration.

Physical-design views

GDS layout, LEF abstracts, SPICE netlists, Verilog models, and interpolated Liberty timing for simulation and place-and-route. BWRC builds also support Liberate characterization and DRC, LVS, and parasitic extraction through commercial tools.

Self-timed architecture

Replica-based timing controls the wordline pulse and sense-amplifier activation. A single bitcell array shares precharge, transmission-gate column muxes, sense amplifiers, and masked write drivers. See the control sequence.

Get involved

SRAM22 is developed on GitHub. Bug reports and pull requests are welcome. Report problems in the issue tracker, or follow the local checkout instructions to make changes and contribute.